Regviz

Raspberry Pi /RP2350 /PPB /CTR

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Interpret as CTR

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https://regviz.com/r/Raspberry Pi/RP2350/PPB/CTR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0IMINLINE 0RES1_1 0DMINLINE 0ERG0CWG0 (RES1)RES1

Description

Provides information about the architecture of the caches. CTR is RES0 if CLIDR is zero.

Fields

IMINLINE

Log2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the PE
RES1_1

Reserved, RES1
DMINLINE

Log2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the PE
ERG

Log2 of the number of words of the maximum size of the reservation granule that has been implemented for the Load-Exclusive and Store-Exclusive instructions
CWG

Log2 of the number of words of the maximum size of memory that can be overwritten as a result of the eviction of a cache entry that has had a memory location in it modified
RES1

Reserved, RES1

Links

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Register License

Copyright © 2024 Raspberry Pi Ltd.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data